Design of high speed interface buffers (IO Pad) for advanced processes
Ensure design is robust and meets ESD, latchup and other reliability qualifications
Closely supervise layout designers to ensure final layouts are consistent with target parameters
Bachelor/Masters Degree in Electronics/Electrical Engineering
Experience in Analog Integrated Circuit design and layout
A thorough understanding of CMOS device and circuit analysis
A strong fundamental understanding of semiconductor physics is required
Dynamic, hardworking and detailed with a strong sense of responsibility and teamwork
The above information on this description has been designed to indicate the general nature, and level, of the work performed by this position. It is not designed to contain, or be interpreted, as a comprehensive inventory of all duties, responsibilities and qualifications required.
We invite interested candidates to write-in with CV in MS Word format to Sansan Sanryani Cahaya, EA 12C6130/ R1767240 email@example.com. We regret that only shortlisted candidates will be contacted for a discussion.
HPS Partners serve an international client base including early stage organisations and leading global corporations. Our assignments range from senior management appointments to experienced individual contributors.
HPS Partners believe the right people in the right jobs, allow synergies to create a strategy in sync with the dynamic marketplace, economy and competition. The right people are directly related to a seamless operating process that produces results. We help highly qualified senior executives achieve personal growth, job satisfaction and advancements. âPlease tell us a little about your professional experience and aspirations
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