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STA/Synthesis Design Engineer

Keywords / Skills : Static Timing Analysis, DFT, RTL, Synthesis, Timing Constraints, Timing Closure

4 - 8 years
Posted: 2018-06-16

Industry
Semiconductor Manufacturing
Function
Manufacturing/ Engineering/ R&D
Role
R&D
Posted On
16th Jun 2018
Job Description
• Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.Most of the emphasis would be on STA. Develop and implement plans to synthe, close timing on complex digital integrated circuits at the block, Static Timing Analysis,DFT,RTL,Synthesis,Timing Constraints,Timing Closure,Design, implement

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www.ust-global.com
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