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Job Responsibilities: - Review SerDes standards to develop novel transceiver architectures and sub-block specifications. - Investigate and develop circuit architectures that address architectural bo

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Job Description: 1. Analog integrated circuit design, responsible for high-speed circuit design and development under advanced technology, including technical specification definition, frontend and

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Job Description: 1. Responsible for the entire process from RTL to GDS 2. Responsible for block level timing closure, formal check, low power check and power analysis 3. Responsible for block leve

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Job Description: 1. Responsible for the entire process from RTL to GDS 2. Responsible for block level timing closure, formal check, low power check and power analysis 3. Responsible for block leve

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Job Responsibilities: . Develop and implement HR strategies and initiatives aligned with the overall business strategy and corporate guideline . Bridge management and employee relations by addressi

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Responsibilities: 1Ensure IT working environment Implement IT policy and procedure Provide IT help desk service and necessary training internally 2Manage IT procurement including but not limited l

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Key Qualifications: . 3+ years of experience in relevant field . Basic understanding of digital design and VLSI concepts is required . Fluent with HDL languages (Verilog, SystemVerilog) . Experie

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Responsibilities: . Closely work with designers and architect to come up with verification and execution plans . Influence and drive verification environment architecture with a team of engineers

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Responsibilities: . Develop micro-architecture for NET, ISP, CV and other algorithms . RTL design, verification, and integration . Synthesis and optimize for timing, area and power o Module and t

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Responsibilities: . RTL design, verification, and integration . Synthesis and optimize for timing, area and power o Module level documentation Position Qualifications: . MS with 2-3 year's equ

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Responsibilities: . Closely work with designers and architect to come up with verification and execution plans . Influence and drive verification environment architecture with a team of engineers

Skills :

Job Responsibilities: - Review SerDes standards to develop novel transceiver architectures and sub-block specifications. - Investigate and develop circuit architectures that address architectural b

Skills :

Responsibilities: . Develop micro-architecture for NET, ISP, CV and other algorithms . RTL design, verification, and integration . Synthesis and optimize for timing, area and power o Module and t

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Responsibilities: . Work with module design owner on DV test flow and testplan requirements . Module DV model and flow development . Design and debug test case, regression and ensure coverage clos

Skills :

Responsibilities: . Closely work with designers and architect to come up with verification and execution plans . Influence and drive verification environment architecture with a team of engineers

Skills :

Job Responsibilities: - Review SerDes standards to develop novel transceiver architectures and sub-block specifications. - Investigate and develop circuit architectures that address architectural b

Skills :

Responsibilities: . Closely work with designers and architect to come up with verification and execution plans . Influence and drive verification environment architecture with a team of engineers

Skills :

Responsibilities: . Develop micro-architecture for NET, ISP, CV and other algorithms . RTL design, verification, and integration . Synthesis and optimize for timing, area and power o Module and t

Skills :

Responsibilities: . Develop micro-architecture for NET, ISP, CV and other algorithms . RTL design, verification, and integration . Synthesis and optimize for timing, area and power o Module and t

Skills :

Responsibilities: . Work with module design owner on DV test flow and testplan requirements . Module DV model and flow development . Design and debug test case, regression and ensure coverage clos

Skills :

Key Qualifications: . 3+ years of experience in relevant field . Basic understanding of digital design and VLSI concepts is required . Fluent with HDL languages (Verilog, SystemVerilog) . Experie

Skills :

Responsibilities: . RTL design, verification, and integration . Synthesis and optimize for timing, area and power o Module level documentation Position Qualifications: . MS with 2-3 year's equ

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RESPONSIBILITIES * Research and develop advanced algorithms for image/video processing and computer vision, e.g. denoising, HDR, super-resolution, image registration, image restoration, etc. * D

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RESPONSIBILITIES * Develop image/video processing algorithms for single/multipe camera related applications, such as mobile, surveillance and V2X (Vehicle-Road Synergy). * Collaborate with softw

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